Schematics

Below are some diagrams of some of the circuitry involved. For a closer look the microsoft office documents are provided for download.


This shows the internal structure of the M6800 Central Processing Unit including all registers. The ALU controller is an added feature and will be discussed further on down.  The need arose to make the micro data bus 16 bits wide, while still keeping 16 bit registers in two halfs.  The actual M6800 uses an 8 bit micro data bus, but the change was made to 16 bits for simplicity and coding issues.

This is the heart of the model - The micro sequencer.  This model was designed by Prof. Townsend, and is used as part of the Machine Structures course.  Some extra features were added including the conditional fetch circuit input (which is discussed in the data sheets). The final presentation will have this model as the graphical representation of the microcode level.

As discussed in the data sheets, there was a need for an ALU Controller. This diagram shows how it is addressed, and how it is connected to the ALU. The four bits allow upto 16 different ALU operations to be executed on the data in ALU1 and ALU2.

[Home] [Proposal] [Data Sheets] [Schematics] [News] [Download] [About Me]